This Is Not Your Father's Von Neumann Machine: How Modern Architecture Impacts Your Java Apps
TS-5496

Managing software performance used to be a relatively straightforward process. Uniprocessors were the norm, the number of cycles each instruction took to execute was known, and it was mostly a matter of measuring how many instructions you were executing per unit of work -- and then reducing that number. The world has changed: The cost of individual instructions varies by several orders of magnitude, depending on how close the data is to the CPU, and improvements in throughput depend on effective use of parallelism. But to design and analyze performant programs, we have to understand something about the underlying hardware and how that has changed in recent years.

For example, a cache miss may take hundreds of cycles and a cache hit only a fraction of a cycle. That two-orders-of-magnitude spread can make relatively small code changes with significant performance consequences; data indirection is more expensive than it looks. (Advances in compiler technology have mostly removed the costs associated with code indirection, but data inlining hasn't moved out of academia yet.) VMs have the opportunity to do aggressive data optimizations, such as hot-field/cold-field splitting, so this wheel may turn yet again.

This session provides an overview of the architecture of modern CPUs, how this has changed in recent years, and what the implications are for software development and performance management.